Binary Subtractor  

A Binary Subtractor is a digital circuit that performs the arithmetic binary subtraction between two numbers with respect to the logic operations and legal guidelines of Boolean Algebra. 

The subtractors are utilized in combinational circuit design and the Arithmetic Logic Unit (ALU) of the processor to calculate a number of addresses. Subtractor circuits cut back sound distortion in amplifiers and the facility of radio indicators.

There are two kinds of Subtractor circuits- 

  • Half Subtractors
  • Full Subtractors

Half Subtractors

Half Subtractors are a sort of digital circuit that calculates the arithmetic binary subtraction between two single-bit numbers. It’s a circuit with two inputs and two outputs.

For 2 single-bit binary numbers A and B, a half subtractor produces two outputs.

  • A is called the Minuend Bit
  • B is known as Subtrahend Bit. 
  • Output D is the distinction between the 2 enter bits (A-B).
  • Output P is the earlier borrow between the 2 enter bits (A-B). 

The earlier borrow is for probably the most vital bit (MSB). 

Operation and Fact Desk for Half Subtractor

Operation:

Case 1: A = 0, B = 0;

In line with Binary subtraction, the distinction of those numbers is Zero with no earlier borrow.

  0

– 0

一一一一一

  0

一一一一一

Therefore, D= 0, P= 0

Case 2: A= 0, B= 1;

In line with Binary subtraction, the distinction between these two numbers is 1 with a earlier borrow of 1.

  0

– 1

→1 (Earlier Borrow)

一一一一一

  1

一一一一一

Therefore, D= 1, P= 1

Case 3: A= 1, B= 0;

As per Binary subtraction, the distinction between these two numbers is 1 with no earlier borrow.

  1

– 0

一一一一一

  1

一一一一一

Therefore, D= 1, P= 0

Case 4: A= 1, B= 1;

In line with Binary subtraction, the distinction between these two numbers is 1 with no earlier borrow.

  1

– 1

一一一一一

  0

一一一一一

Therefore, D= 0, P= 0

Fact Desk:

ABDistinction (S)Earlier Borrow (P)
0000
0111
1010
1100
Half Subtractor Circuit Diagram
Half Subtractor Circuit Diagram

Designing Ok-Map for Half Subtractor

By the Fact Desk, We are able to design a Karnaugh Map or Ok-Map for Half Subtractor to acquire a Boolean Expression.

We are able to design a Karnaugh Map or Ok-Map for Half Subtractor to acquire a Boolean Expression.

Karnaugh Map for Distinction of Half Subtractor

Half Subtractor Karnaugh Map for Difference
Half Subtractor Karnaugh Map for Distinction

By fixing this, 

D= A’B + AB’

Half Subtractor Equation Karnaugh Map for Difference

Karnaugh Map for Earlier Borrow of Half Subtractor

Half Subtractor K-Map
Half Subtractor Ok-Map for Borrow

By trying on the Ok-map, We are able to conclude, we can conclude;

P= A’•B

This Boolean expression helps us to design a half subtractor with an XOR Gate and AND gate.

The operation of the Half Subtractor is restricted as a result of it will possibly solely subtract two-bit binary digits. It doesn’t account for the borrow of the decrease vital stage.

This incapability of the circuit places a limitation on its use. Half Subtractors have been utilized in early microprocessors and fundamental digital circuits. 

Designing Half Subtractor utilizing Fundamental Logic Gates adopted by NAND Gate

Half Subtractor Circuit using NAND Gate
Half Subtractor Circuit utilizing NAND Gate

As,

D= A’B + AB’

Taking double complement 

Equation

In line with d-Morgan’s regulation,

Logic Equation

Equally, for the earlier borrow circuit,

P= A’•B

Taking double complement 

Half Subtractor Equation

Full Subtractor

A full Subtractor is a digital circuit that performs the subtraction of three single-digit binary numbers. This can be a three-input and two-output digital circuit. 

Full Subtractor Input Output
Full Subtractor Enter/Output

For 3 single-bit binary numbers A, B, and P, the complete subtractor circuit generates two single-bit binary outputs D (Distinction), and Q (Borrow Output).

  • A is the Minuend.
  • B is the Subtrahend.
  • P is the Earlier Borrow Bit.
  • D is the Distinction between A, B, and P.
  • Q is the Borrow Output.

A full Subtractor was made to beat the constraints of a Half Subtractor.

Full Subtractors are used in-

  • Performing Arithmetical features like subtraction in ALU of Microprocessors.
  • Digital Calculators 
  • Digital Units
  • Computing Handle Tables in ALU.
  • DSP and networking-based techniques.

Operation and Fact Desk for Full Subtractor

Operation:

Case 1: A= 0, B= 0, and P= 0;

The distinction of the three binary numbers 0, 0, and Zero produces a distinction of Zero and generates no borrow output. 

       0

      -0

      -0

一一一一一

        0

一一一一一

Therefore, D= 0, Q= 0

Case 2: A= 0, B= 0, and P= 1;

The distinction of the three binary numbers 0, 0, and 1 produces a distinction of 1 and generates a borrow output bit. 

       0

      -0

      -1

→1

一一一一一

        1

一一一一一

Therefore, D= 1, Q= 1

Case 3: A= 0, B= 1, and P= 0;

The distinction of the three binary numbers 0, 1, and Zero produces a distinction of 1 and generates a borrow output bit. 

       0

      -1

→1

      -0

一一一一一

        1

一一一一一

Therefore, D= 1, Q= 0

Case 4: A= 0, B= 1, and P= 1;

The distinction of the three binary numbers 0, 1, and 1 produces a distinction of Zero and generates a borrow output bit. 

       0

      -1

→1

      -1

一一一一一

        0

一一一一一

Therefore, D= 0, Q= 1

Case 5: A= 1, B= 0, and P= 0;

The distinction of the three binary numbers 1, 0, and Zero produces a distinction of 1 and generates no borrow output. 

       1

      -0

      -0

一一一一一

        0

一一一一一

Therefore, D= 1, Q= 0

Case 6: A= 1, B= 0, and P= 1;

The distinction of the three binary numbers 1, 0, and 1 produces a distinction of Zero and generates no borrow output. 

       1

      -0

      -1

一一一一一

        0

一一一一一

Therefore, D= 0, Q= 0

Case 7: A= 1, B= 1, and P= 0;

The distinction between the three binary numbers 1, 1, and Zero produces a distinction of Zero and generates no borrow output. 

       1

      -0

      -0

一一一一一

        0

一一一一一

Therefore, D= 0, Q= 0

Case 8: A= 1, B= 1, and P= 1;

The distinction between the three binary numbers 1, 1, and 1 produces a distinction of 1 and generates a borrow output bit. 

The distinction between A=1 and B=1 is 0. P=1 will get subtracted from this Zero to supply an output of 1 by producing a borrowed output bit.

       1

      -1

      -1

→1

一一一一一

        1

一一一一一

Therefore, D= 1, Q= 1

Fact Desk:
ABPDistinction (D)

D= A-B-P

Borrow Output (Q)
00000
00111
01011
01101
10010
10100
11000
11111

Designing Ok-Map for Full Subtractor

By the Fact Desk, We are able to design a Karnaugh Map or Ok-Map for Full Subtractor to acquire a Boolean Expression.

Karnaugh Map for Distinction of Full Subtractor:
Full Subtractor karnaugh Map
Full Subtractor karnaugh Map for Distinction

By Fixing this,

Karnaugh Map Equation  

The phrases K-Map Equation kind a complement of one another, and the entire equation turns into an EX-OR operation;

Subtractor Equation

Simplifying additional, 

Full Subtractor Difference Equation

Karnaugh Map for Borrow Output of Full Subtractor:
Full Subtractor K-Map
Full Subtractor karnaugh Map for Borrow

The equation turns into,

Full Subtractor Borrow Equation

Full Subtractor Circuit Diagram

That is the top of the article…..

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