Designing within the cloud; specialised SystemVerilog lessons; COTS chiplets; ultra-cheap smartphones.

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Synopsys’ Teng-Kiat Lee and Sandeep Mehndiratta argue that IC design within the cloud can assist an current on-prem technique, allow giant and small enterprises to handle value and capability extra successfully, and supply safety for useful semiconductor IP.

Siemens EDA’s Chris Spear finds that SystemVerilog lessons are a great way to encapsulate each variables and the routines that operates on them, and presents a approach to reuse the strategies however change the kind of properties.

Cadence’s Paul McLellan considers naming conventions for sticking a number of die in a bundle and key questions for whether or not off-the-shelf chiplets can be a viable market.

Arm’s Neil Fletcher considers the technical capabilities wanted for extremely low-cost smartphones that would enhance web accessibility in rising economies and assist bridge the digital divide.

Renesas’ Graeme Clark explains the Knowledge Operations Circuit (DOC), a microcontroller peripheral that may present efficiency benefits in actual time functions, permitting duties to be offloaded from the CPU, bettering the response time to asynchronous occasions, and probably lowering energy consumption.

Ansys’ Kerry Herbert factors to eye-tracking expertise as a key enabler for AR/VR that may assist scale back vergence-accommodation battle, which might result in focusing issues, eye pressure, and visible fatigue.

A Riscure author supplies a primer on electro-magnetic fault injection, which entails creating an electromagnetic discipline over the chip that would trigger a change within the chip’s conduct and can be utilized to attempt to bypass a safety mechanism or retrieve encryption keys.

A Rambus author factors to the most recent updates to PCIe and CXL, which promise to extend knowledge heart efficiency and scalability whereas lowering the entire value of possession.

In a weblog for SEMI, Intel’s Garima Gautam and ASM Worldwide’s William Olson contemplate the strategies, instruments, and greatest practices that can advance and promote range throughout the worldwide provide chain and  develop a complete, international technique for rising provide chain resilience.

Plus, make amends for the blogs featured within the newest Manufacturing, Packaging & Materials newsletter:

SEMI’s Gity Samadi and NextFlex’s Paul Semenza have a look at novel interconnect and fasten strategies from FLEX 2022 for extra compact, light-weight, and better efficiency versatile electronics.

Coventor’s Qingpeng Wang reveals the best way to overcome restricted wafer check knowledge when selecting a DRAM patterning scheme.

Amkor’s Vineet Pancholi and Dennis Dinawanao current check steps and parameters for brand spanking new and established energy applied sciences.

Rambus’ Emma-Jane Crozier factors to why safety for accelerator blades is totally different, and what to do about it.

Synopsys’ Firooz Massoudi and Ash Patel have a look at how timing uncertainty in trendy digital designs could make it troublesome to find out the minimal provide voltage.

Jesse Allen

Jesse Allen

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Jesse Allen is the Information Middle administrator and a senior editor at Semiconductor Engineering.



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